Field of the Invention
Embodiments of the present invention relate generally to storage enclosures, and, more specifically, to low latency storage enclosure with large capacity.
Description of the Related Art
A conventional storage enclosure includes an expander coupled to an interface unit that, in turn, is coupled to a single large printed circuit board (PCB). The single large PCB includes a collection of ports for mounting hard drives. The PCB includes a set of traces that couple the hard drives to the interface unit and, in turn, to the expander. The expander may be coupled to a host computer system and receive input/output (I/O) commands from that host computer. The expander transmits these commands to the interface unit. The interface unit includes routing circuitry that routes I/O commands from the expander to specific PCB traces, thereby providing access to individual hard drives.
One drawback of the configuration described above is that the routing circuitry within the interface unit includes a rather complex arrangement of traces that tends to induce crosstalk. For example, a storage enclosure with 30 hard drives could include routing circuitry with 30 or more locations where traces cross over one another. The crosstalk not only can degrade the quality of the signals transmitted via the traces, the crosstalk also limits the number of hard drives that can be included in the storage enclosure, because the crosstalk increases as the number of hard drives included in the storage enclosure increases. Thus, if too many hard drives are included in the storage disclosure, then the crosstalk within the interface can increase beyond acceptable levels. Consequently, a conventional storage enclosure typically includes 30 or fewer hard drives.
Another drawback of the convention storage enclosure configuration described above is that the PCB traces within the single large PCB also induce crosstalk, which further limits the number of drives that can be included within the storage enclosure. Further, if the traces within the large PCB exceed a certain length, then the quality of the signals transmitted via those traces can significantly degrade. This constraint limits the size of the PCB, and, in turn, the number of hard drives that the PCB can support.
Yet another drawback of the above configuration is that the complex routing scheme implemented to properly couple all of the hard drives to the interface unit via the PCB traces creates timing differences in signals that are transmitted to different hard drives. For example, a first hard drive with relatively simple routing that is positioned relatively close to the interface unit receives I/O commands much sooner than a second hard drive with more complex routing and positioned relatively far away from the interface unit. These timing differences can make synchronization between hard drives difficult or impossible. Generally, reducing the number of drives in the storage enclosure is one way to reduce the complexity of the routing scheme in order to mitigate such timing differences.
As the foregoing illustrates, what is needed in the art is a storage enclosure design capable of supporting a larger number of hard drives than conventional enclosure designs.